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mo sa ms6715 1 stereo input / 1 stereo output audio processor rev 3 1/16 www.mosanalog.com 1 stereo input and 1 stereo output volume, tone, balance, loudness function features ? operation range : 2.7v~6.5v ? 2 independent speaker controls for balance ? tone controls (treble and bass) ? loudness and independent mute function ? volume control in 1.25 db/step ? i 2 c interface ? components less and good psrr ? housed in sop20, ssop20 package applications ? portable audio device ? hi-fi audio system ? cross-reference: tda7315 description the ms6715 is a 1 stereo inputs/2-channel outputs d igital control audio processor for the low voltage operation. volume, tone (bass and treble), and balance (left/r ight) processor are incorporated into a single chip . the ms6715 also has the loudness function. these functions can be b uilt a hi-fi audio system easily. all functions are programmable via the serial i 2 c bus. the default states of the chip as the power is on are: the volume is -78.75db, the stereo 4 is selected, all the speakers are mute and the gains o f the bass and the treble are 0db. block diagram rin treble bass bass treble lin r b r b loud_r treb_r bout_r bin_r loud_l treb_l bout_l bin_l 7 4 5 11 6 9 13 14 15 12 volume & londness volume & londness supply ref avdd agnd 1 2 3 speaker att mute speaker att mute serial bus decoder and latches scl sda dgnd out_l out_r 18 19 17 16 20
mo sa ms6715 1 stereo input / 1 stereo output audio processor rev 3 2/16 www.mosanalog.com pin configuration symbol pin description ref 1 analog reference voltage 1/2vdd vdd 2 supply input voltage agnd 3 analog ground treb_l 4 left channel input for treble controller treb_r 5 right channel input for treble controller rin 6 right channel input loud_r 7 right channel loudness input nc 8 no connected loud_l 9 left channel loudness input nc 10 no connected lin 11 left channel input bin_l 12 left bass controller input channel bout_l 13 left bass controller output channel bin_r 14 right bass controller input channel bout_r 15 right bass controller output channel out_r 16 right speaker output out_l 17 left speaker output dgnd 18 digital ground sda 19 i 2 c data input scl 20 i 2 c clock input treb_l nc treb_r 19 18 17 20 2 3 4 1 scl sda dgnd out_l ref vdd agnd out_r bout_r bin_r bout_l bin_l lin nc loud_l loud_r rin 15 14 13 16 6 7 8 5 11 12 10 9 ms6715 sop20 / ssop20 ordering information package part number packaging marking transport media 20-pin sop (lead free) ms6715gtr ms6715g 1k units t ape and reel 20-pin sop (lead free) ms6715gu ms6715g 36 units tu be 20-pin ssop (lead free) MS6715SSGTR ms6715g 2.5k un its tape and reel 20-pin ssop (lead free) ms6715ssgu ms6715g 56 units tube absolute maximum ratings symbol parameter rating unit v dd supply voltage 6.5 v v esd electrostatic handling -3000 to 3000 v t stg storage temperature range -65 to 150 t a operating ambient temperature range -40 to 85 t j maximum junction temperature 150 t s soldering temperature, 10 seconds 260 r thja thermal resistance from junction to ambient in free air sop20 ssop20 210 210 /w
mo sa ms6715 1 stereo input / 1 stereo output audio processor rev 3 3/16 www.mosanalog.com operating ratings symbol parameter min typ max unit v dd supply voltage 2.7 - 6.5 v 5v electrical characteristics (ta=25 , all stages 0db, f=1khz, c ref =22uf, refer to the application circuit; unless ot herwise specified) symbol parameter conditions min typ max unit supply i q quiescent current v in =0v - 12.2 12.5 ma psrr power supply rejection ratio c ref = 22uf, f = 100hz 55 60 - db input r in input resistance 35 50 70 k loud loudness c loud =100nf, f =20hz volume=-40db 19 20 - db volume control cr vol volume control range attenuation -78.75 - 0 db res vol volume step resolution - 1.25 - db av = 0 to -40db -0.5 0 1 db err vol volume setting error av = -40 to -60db -1 0 5 db speaker attenuators cr spk speaker control range attenuation -37.5 - 0 db res spk speaker step resolution - 1.25 - db err spk speaker setting error -0.2 0 0.1 db mute output mute attenuation - -65 -60 db bass control cr bas bass control range boost/cut -14 - 14 db res bas bass step resolution - 2 - db err bas speaker setting error f =100hz -0.3 0 0.1 db r b internal feedback resistance 34 44 58 k treble control cr bas treble control range boost/cut -14 - 14 db res bas treble step resolution - 2 - db err bas treble setting error f =20khz -0.3 0 0.1 db general vo max maximum output voltage swing (thd+n)/s <0.3% - 4.5 - vpp - -75 - db thd+n total harmonic distortion plus noise v out =2vpp - 0.0177 - % s/n signal-to-noise ratio v out =4vpp - 97 - db cs channel separation left/right 93 97 - db bus input v ih bus high input level 2 - - v v il bus low input level - - 0.8 v notes: bass and treble response see to curve. the c enter frequency and quality of the response behavio r can be chosen by the external.
mo sa ms6715 1 stereo input / 1 stereo output audio processor rev 3 4/16 www.mosanalog.com 2.7v electrical characteristics (ta=25 , all stages 0db, f=1khz, c ref =22uf, refer to the application circuit; unless ot herwise specified) symbol parameter conditions min typ max unit supply i q quiescent current v in =0v - 8.7 9 ma psrr power supply rejection ratio c ref = 22uf, f = 100hz 53 58 - db general vo max maximum output voltage swing (thd+n)/s <0.3% - 2.5 - vpp - -50 - db thd+n total harmonic distortion plus noise v out =2vpp - 0.3 - % s/n signal-to-noise ratio v out =2.5vpp 90 94 - db cs channel separation left/right 90 94 - db typical performance characteristics (ta=25 , all stages 0db, f=1khz, c ref =22uf, refer to the application circuit; unless ot herwise specified) loud (db) frequency (hz) loud (db) frequency (hz) loud (db) frequency (hz) loudness vs. volume loudness vs. frequency vs. volume loudness vs. external capacitors tone (db) frequency (hz) channel separation (db) frequency (hz) quiescent current (ma) supply voltage (v) typical tone response channel separation vs. frequency quiescent current vs. supply voltage v dd =5v c loud = 100nf 220nf open v dd =5v v in =0dbv v dd =5v treble=bass= -14~14db v dd =5v v dd =5v volume=-40db 56nf 100nf loudness off 33nf 10nf v dd =2.7v v in =-3dbv
mo sa ms6715 1 stereo input / 1 stereo output audio processor rev 3 5/16 www.mosanalog.com thd+n (%) frequency (hz) thd+n (%) output voltage (dbv) thd+n (%) output voltage (dbv) thd+n vs. frequency thd+n vs. output voltage thd+n vs. output voltage psrr (db) frequency (hz) psrr (db) frequency (hz) psrr vs. frequency psrr vs. frequency v dd =5v v o =2vpp v dd =5v f=1khz f=20hz f=20khz v dd =2.7v v o =2vpp v dd =2.7v f=1khz f=20hz f=20khz cap=22uf cap=10uf v dd =5v v rr =-20dbv cap=22uf cap=10uf v dd =2.7v v rr =-20dbv
mo sa ms6715 1 stereo input / 1 stereo output audio processor rev 3 6/16 www.mosanalog.com i 2 c bus description start and stop conditions a start condition is activated when the scl is set to high and sda shifts from high to low state. the stop condition is activated when scl is set to high and sda shifts from low to high state. please refer to the timing diagram below. sda scl start stop scl: serial clock line, sda: serial data line data validity a data on the sda line is considered valid and stab le only when the scl signal is in high state. the h igh and low states of the sda line can only change when the scl signal is low. please refer to the figure belo w. sda scl data line stable, data valid data change allowed byte format every byte transmitted to the sda line consists of 8 bits. each byte must be followed by an acknowledg e bit. the msb is transmitted first. acknowledge during the acknowledge clock pulse, the master (up) put a resistive high level on the sda line. the pe ripheral (audio processor) that acknowledges has to pull-dow n (low) the sda line during the acknowledge clock p ulse so that the sda line is in a stable low state during this c lock pulse. please refer to the diagram below. scl sda msb acknowledge 1 2 3 7 8 9 start the audio processor that has been addressed has to generate an acknowledge after receiving each byte, otherwise, the sda line will remain at the high level during t he ninth (9 th ) clock pulse. in this case, the master transmitter can generate the stop information in order to abort the transfer.
mo sa ms6715 1 stereo input / 1 stereo output audio processor rev 3 7/16 www.mosanalog.com timing of sda and scl bus lines t f s t low t hd;sta t r t hd;dat t su;dat t f t high t hd;sta t su;sta s r s p t sp t su;sto t r t buf sda scl standard mode symbol parameter min max unit f scl scl clock frequency 0 100 khz t hd:sta hold time (repeated) start condition. after this period, the first clock pulse is generat ed 4.0 - us t low low period of the scl clock 4.7 - us t high high period of the scl clock 4.0 - us t su:sta set-up time for a repeated start condition 4.7 - us t hd:dat data hold time: for i 2 c-bus devices 0 3.45 us t su:dat data-set-up time 250 - ns t r rise time of both sda and scl signals - 1000 ns t f fall time of both sda and scl signals - 300 ns t su:sto set-up time for stop condition 4.0 - us t buf bus free time between a stop and start condition 4. 7 - us c b capacitive load for each bus line - 400 pf v nl noise margin at the low level for each connected de vice (including hysteresis) 0.1v dd - v v nh noise margin at the high level for each connected d evice (including hysteresis) 0.2v dd - v bus interface data are transmitted to and from the mcu to the ms6 715 via the sda and scl. the sda and scl make up th e bus interface. it should be noted that pull-up resi stors must be connected to the positive supply volt age. sda (serial data line) rp rp scl (serial clock line) pull up resistors v dd mcu ms6715
mo sa ms6715 1 stereo input / 1 stereo output audio processor rev 3 8/16 www.mosanalog.com interface protocol the format consists of the following ? a start condition ? a chip address byte including the ms6715 address. ( 7bits) ? the 8 th bit of the byte must be 0.(write=0, read=1) ? ms6715 must always acknowledge the end of each tran smitted byte. ? a data sequence (n-bytes + acknowledge) ? a stop condition scl sda 1-7 8 9 1-7 8 9 9 8 1-7 s p address r / w -- ack ack ack data data start condition stop condition address code the chip address of the ms6715 is 88h. 1 0 0 0 0 0 1 0 7 bits address ms6715 address w data bytes description the default states of the chip as the power is on a re: the volume is -78.75db, the stereo 4 is selecte d, all the speakers are mute and the gains of the bass and the treble are 0 db. msb lsb function 0 0 b2 b1 b0 a2 a1 a0 volume control 1 0 0 b1 b0 a2 a1 a0 speaker att l 1 0 1 b1 b0 a2 a1 a0 speaker att r 0 1 0 * * l * * loudness control 0 1 1 0 c3 c2 c1 c0 bass control 0 1 1 1 c3 c2 c1 c0 treble control where ax = 1.25db steps; bx = 10db steps; cx = 2db steps; * = no effect
mo sa ms6715 1 stereo input / 1 stereo output audio processor rev 3 9/16 www.mosanalog.com volume msb lsb function 0 0 b2 b1 b0 a2 a1 a0 volume 1.25 db steps 0 0 0 0 0 0 1 -1.25 0 1 0 -2.5 0 1 1 -3.75 1 0 0 -5 1 0 1 -6.25 1 1 0 -7.5 1 1 1 -8.75 0 0 b2 b1 b0 a2 a1 a0 volume 10db steps 0 0 0 0 0 0 1 -10 0 1 0 -20 0 1 1 -30 1 0 0 -40 1 0 1 -50 1 1 0 -60 1 1 1 -70 the default volume is C78.75db. speaker attenuator msb lsb function db 1 0 0 b1 b0 a2 a1 a0 speaker att l 1 0 1 b1 b0 a2 a1 a0 speaker att r 0 0 0 0 0 0 1 -1.25 0 1 0 -2.5 0 1 1 -3.75 1 0 0 -5 1 0 1 -6.25 1 1 0 -7.5 1 1 1 -8.75 0 0 0 0 1 -10 1 0 -20 1 1 -30 1 1 1 1 1 mute the default state is mute.
mo sa ms6715 1 stereo input / 1 stereo output audio processor rev 3 10/16 www.mosanalog.com loudness msb lsb function 0 1 0 x x l x x loudness 0 loudness on 1 loudness off the default state is loudness off. x: dont care. bass and treble msb lsb function db 0 1 1 0 c3 c2 c1 c0 bass 0 1 1 1 c3 c2 c1 c0 treble 0 0 0 0 -14 0 0 0 1 -12 0 0 1 0 -10 0 0 1 1 -8 0 1 0 0 -6 0 1 0 1 -4 0 1 1 0 -2 0 1 1 1 0 1 0 0 0 0 1 0 0 1 2 1 0 1 0 4 1 0 1 1 6 1 1 0 0 8 1 1 0 1 10 1 1 1 0 12 1 1 1 1 14 the default state is bass 0db and treble 0db.
mo sa ms6715 1 stereo input / 1 stereo output audio processor rev 3 11/16 www.mosanalog.com examples set volume at C37.5db. msb ack start 0 0 0 1 1 0 1 1 ms6715 address lsb stop ack -30db -7.5db data byte set speaker right at -30db. msb ack start 1 0 1 1 0 0 1 0 ms6715 address lsb stop ack -30db 0db speaker r data byte set speaker left in mute-on. msb ack start 1 0 0 1 1 1 1 1 ms6715 address lsb stop ack speaker l mute data byte set loudness in turn-on. msb ack start 0 1 0 x x x x 0 ms6715 address lsb stop ack loudness on data byte x : don care s set treble at -10db. msb ack start 0 1 1 1 1 0 0 0 ms6715 address lsb stop ack treble -10db data byte
mo sa ms6715 1 stereo input / 1 stereo output audio processor rev 3 12/16 www.mosanalog.com application information basic application example 9 13 100n 12 5.6k 100n 100n 4 2.7n 7 100n 15 100n 14 100n 5.6k 5 2.7n mcu ms6715 rin lin ref sda avdd agnd out_l out_r 1 2 3 11 6 18 19 16 17 20 scl dgnd 2.2u 2.2u avdd 22u 10u 10u input output loud_l treb_l bout_l bin_l loud_r treb_r bout_r bin_r
mo sa ms6715 1 stereo input / 1 stereo output audio processor rev 3 13/16 www.mosanalog.com external dimensions ssop20 a a2 a1 d e1 e b e zd l1 detail a l ? 2 ? 1 r1 r ? detail a h x 45 c sop20 (300mil) h d h x 45 c detail a 0.25mm detail a l ? e a a1 b e dimension in mm dimension in inch symbol min max min max a 1.35 1.75 0.053 0.069 a1 0.10 0.25 0.004 0.010 a2 1.50 0.059 b 0.20 0.30 0.008 0.012 c 0.18 0.25 0.007 0.010 e 0.635 basic 0.025 basic d 8.56 8.74 0.337 0.344 e 5.79 6.20 0.228 0.244 e1 3.81 3.99 0.150 0.157 l 0.41 1.27 0.016 0.050 h 0.25 0.50 0.010 0.020 l1 0.254 basic 0.010 basic zd 1.4732 ref 0.058 ref r1 0.20 0.33 0.008 0.013 r 0.20 0.008 0 o 8 o 0 o 8 o 1 0 o 0 o 2 5 o 15 o 5 o 15 o dimension in mm dimension in inch symbol min max min max a 2.35 2.65 0.0926 0.1043 a1 0.10 0.30 0.004 0.0118 b 0.33 0.51 0.013 0.020 c 0.23 0.32 0.0091 0.0125 e 1.27 bsc 0.050 bsc d 12.6 13 0.4961 0.5118 e 7.4 7.60 0.2914 0.2992 h 10.00 10.65 0.394 0.419 l 0.40 1.27 0.016 0.050 h 0.25 0.75 0.010 0.029 0 o 8 o 0 o 8 o
mo sa ms6715 1 stereo input / 1 stereo output audio processor rev 3 14/16 www.mosanalog.com demo board the demo board used ir technique controller to cont rol the ms6715. the default states of demo board are volume -20db, attenuator speakers 0db, loudness off, bass 0db and treble 0db. label 1: supply voltage the avdd and dvdd should be the same supply voltage , the supply range is 2.7~6.5 vdc. label 2: led indicator the led indicates the power status and the ir recei ved status. it is red-dark blink once when the mcu has received the function code correctly. label 3: output section please connected to a post-power-amplifier, as acti ve speaker. label 4: input section please input stereo audio signal, as music or sine wave. label 5: mcu reset the ms6715 will be loaded the default values by mcu . the default states of demo board are volume -20db , attenuator speakers 0db, loudness off, bass 0db and treble 0db. 1 2 3 1 4 5
mo sa ms6715 1 stereo input / 1 stereo output audio processor rev 3 15/16 www.mosanalog.com ir controller vol+, vol- : the volume control keys. the volume control in 1.25db/step as the switch is pressed once, the range is C79db to 0db. attlf+, attlf- : the attenuation control keys for left speaker outpu t. the attenuation in 1.25db/step as the switch is pre ssed once, the range is -37.5db to 0db. attrf+, attrf- : the attenuation control keys for right speaker outp ut. the attenuation in 1.25db/step as the switch is pre ssed once, the range is -37.5db to 0db. tre+, tre- : the treble control keys. the treble control in 2db/step as the switch is pre ssed once, the range is C14db to 14db. bas+, bas- : the bass control keys. the bass control in 2db/step as the switch is press ed once, the range is -14db to 14db. loud : the loudness key press the key once to set loudness on or loudness o ff. mute : the mute key controls all speaker outputs press the key once to set mute-on or mute-off.
mo sa ms6715 1 stereo input / 1 stereo output audio processor rev 3 16/16 www.mosanalog.com circuit y1 12m rst 1 p3.0 2 p3.1 3 xtal2 4 xtal1 5 p3.2 6 p3.3 7 p3.4 8 p3.5 9 gnd 10 vcc 20 p1.7 19 p1.6 18 p1.5 17 p1.4 16 p1.3 15 p1.2 14 p1.1 13 p1.0 12 p3.7 11 u1 at89c2051 1 2 j1 dvcc r4 10k s1 rst ir_in + c2 10u + c4 20p + c5 20p dvcc vs 3 ir 1 gnd 2 j2 ir r3 10k + c3 470p + c1 47u ir_in r1 220 sda scl ref 1 vdd 2 agnd 3 treb_l 4 treb_r 5 rin 6 loud_r 7 nc 8 loud_l 9 nc 10 lin 11 bin_l 12 bout_l 13 bin_r 14 bout_r 15 rout 16 lout 17 dgnd 18 sda 19 scl 20 u2 ms6715 1 2 j4 avdd + c9 10u + c10 10u + c15 22u + c7 10u + c8 10u r5 5.6k r6 5.6k + c14 0.1u + c13 0.1u + c12 0.1u + c11 0.1u + c19 0.1u + c18 0.1u + c17 2.7n + c16 2.7n + c6 0.1u sda scl avdd w1 jumper j7 output j8 in3 1 2 3 j6 input 1 2 3 j5 out d1 in1 r2 1k 1 2 3 j3 lcd rx tx rx tx + c20 10u + c21 0.1u + c22 10u + c23 0.1u

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